Designing digital computing systems with Verilog [E-Book] / David J. Lilja and Sachin S. Sapatnekar.
Lilja, David J., (author)
Sapatnekar, Sachin S., (author)
Cambridge : Cambridge University Press, 2005
1 online resource (ix, 160 pages)
englisch
9780521828666
9780521045728
9780511607059
Full Text
This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.