This title appears in the Scientific Report :
2013
Please use the identifier:
http://dx.doi.org/10.1088/1748-0221/7/01/C01081 in citations.
GOSSIPO-4: an array of high resolution TDCs with a PLL control
GOSSIPO-4: an array of high resolution TDCs with a PLL control
GOSSIPO-4 is a prototype chip featuring an array of high resolution Time to Digital Converters with a PLL control that has been taped out the 9th of August 2011. This prototype is the successor of GOSSIPO-3 test chip and the precursor of the 65k pixel chip TimePix3. The prototype is being developed...
Saved in:
Personal Name(s): | Zappon, F (Corresponding author) |
---|---|
Beuzekom, M van / Gromov, V / Kluit, R / Fang, X / Kruth, A | |
Contributing Institute: |
Zentralinstitut für Elektronik; ZEA-2 |
Published in: | Journal of Instrumentation, 7 01, S. C01081 - C01081 |
Imprint: |
London
Inst. of Physics
2012
|
Physical Description: |
? |
DOI: |
10.1088/1748-0221/7/01/C01081 |
Conference: | Topical Workshop on Electronics for Particle Physics, Vienna (Austria), 26092011 - 30092011 |
Document Type: |
Contribution to a conference proceedings Journal Article |
Research Program: |
ohne Topic |
Publikationsportal JuSER |
GOSSIPO-4 is a prototype chip featuring an array of high resolution Time to Digital Converters with a PLL control that has been taped out the 9th of August 2011. This prototype is the successor of GOSSIPO-3 test chip and the precursor of the 65k pixel chip TimePix3. The prototype is being developed to test a set of new features that will be used in TimePix3, including a 8 pixel structure sharing one fast oscillator with a new topology, a PLL to provide the control voltage to the oscillators, a custom fast counter and a new small-area cell library. |