This title appears in the Scientific Report :
2015
Please use the identifier:
http://hdl.handle.net/2128/9548 in citations.
System level evaluation of an in-memory-processing architecture
System level evaluation of an in-memory-processing architecture
In this talk we will present IBM's Active Memory Cube (AMC) architecture and the outcome of a research project that aimed on assessing the usability and efficiency of this architecture for selected scientific applications. The AMC architecture augments the Hybrid Memory Cube (HMC) architecture...
| Personal Name(s): | Pleiter, Dirk (Corresponding author) |
|---|---|
| Contributing Institute: |
Jülich Supercomputing Center; JSC |
| Imprint: |
2015
|
| Conference: | Scalable Approaches to High Performance and High Productivity Computing, Bertinoro (Italy), 2015-09-21 - 2015-09-24 |
| Document Type: |
Conference Presentation |
| Research Program: |
Supercomputer Facility |
| Link: |
OpenAccess OpenAccess |
| Publikationsportal JuSER |
|
In this talk we will present IBM's Active Memory Cube (AMC) architecture and the outcome of a research project that aimed on assessing the usability and efficiency of this architecture for selected scientific applications. The AMC architecture augments the Hybrid Memory Cube (HMC) architecture by significant processing capabilities. Such processing-in-memory architectures promise increased compute performance at decreased costs in terms of energy as they allows for a significant reduction of off-chip data movement. The goal of this work was a system level assessment of the potential for efficient exploitation of the AMC architecture by relevant scientific applications. This could be achieved by combining cycle accurate simulations of relevant application kernels with performance models to explore performance for proxy-architectures comprising AMC modules. |