This title appears in the Scientific Report :
2016
Please use the identifier:
http://dx.doi.org/10.1109/LED.2016.2582041 in citations.
Complementary Strained Si GAA Nanowire TFET Inverter With Suppressed Ambipolarity
Complementary Strained Si GAA Nanowire TFET Inverter With Suppressed Ambipolarity
In this letter, we present complementary tunneling field-effect transistors (CTFETs) based on strained Si with gate all around nanowire structures on a single chip. The main focus is to suppress the ambipolar behavior of the TFETs with a gate-drain underlap. Detailed device characterization and demo...
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Personal Name(s): | Luong, Gia Vinh (Corresponding author) |
---|---|
Narimani, K. / Tiedemann, Andreas / Bernardy, P. / Trellenkamp, S. / Zhao, Q. T. / Mantl, S. | |
Contributing Institute: |
JARA-FIT; JARA-FIT Halbleiter-Nanoelektronik; PGI-9 |
Published in: | IEEE electron device letters, 37 (2016) 8, S. 950 - 953 |
Imprint: |
New York, NY
IEEE
2016
|
DOI: |
10.1109/LED.2016.2582041 |
Document Type: |
Journal Article |
Research Program: |
Controlling Electron Charge-Based Phenomena |
Publikationsportal JuSER |
In this letter, we present complementary tunneling field-effect transistors (CTFETs) based on strained Si with gate all around nanowire structures on a single chip. The main focus is to suppress the ambipolar behavior of the TFETs with a gate-drain underlap. Detailed device characterization and demonstration of a CTFET inverter show that the ambipolar current is successfully eliminated for both pand n-devices. The CTFET inverter transfer characteristics indicate maximum separation of the high/low level with a sharp transition (high voltage gain) at a Vdd down to 0.4 V. In addition, high noise margin levels of 40% of the applied Vdd are obtained. |