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Jülich Supercomputing Center; JSC
Burg, Heribert C.
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Jülich Supercomputing Center; JSC
Burg, Heribert C.
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Report
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1
Report
Design Based Methods for the Mapping of Algorithms to Parallel Processors
Burg, Heribert C.
1996
1996
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2
Report
Modelling of Parallel Processing Tasks by Combinatorial Designs
Burg, Heribert C.
1996
1996
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3
Report
Improving Communication Load Balance Using Design Generators
Burg, Heribert C.
1996
1996
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4
Report
Partitioning of Hypercubes by Resolution of Combinatorial Designs
Burg, Heribert C.
1996
1996
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5
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Randomized Routing Using Difference Sets
Burg, Heribert C.
1996
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6
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Mapping Based on Combinatorial Designs
Burg, Heribert C.
1996
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7
Report
Massively Parallel Computing Using the Intel Paragon XP/S Computer at the Central Institute for Applied Mathematics of the Research Centre Jülich
Burg, Heribert C.
1996
1996
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8
Report
Versuchspläne in der Parallelverarbeitung
Burg, Heribert C.
1994
1994
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9
Report
Intel Paragon XP/S - Architecture, Software Environment, and Performance
Berrendorf, Rudolf
1994
1994
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10
Report
A Program for the Simulation of Deterministic and Randomized Routing on the Hypercube
Burg, Heribert C.
1993
1993
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11
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Anwendungen kombinatorischer Versuchspläne in der Parallelverarbeitung
Burg, Heribert C.
1993
1993
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Burg, Heribert C.
Berrendorf, Rudolf
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Detert, Ulrich
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Esser, Rüdiger
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Gerndt, Michael
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Knecht, Renate
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Zentralinstitut für Angewandte Mathematik; ZAM
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