This title appears in the Scientific Report :
2023
Please use the identifier:
http://dx.doi.org/10.48550/ARXIV.2304.13531 in citations.
Please use the identifier: http://dx.doi.org/10.34734/FZJ-2024-00418 in citations.
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar
This paper proposes an architecture that integrates neural networks (NNs) and hardware security modules using a single resistive random access memory (RRAM) crossbar. The proposed architecture enables using a single crossbar to implement NN, true random number generator (TRNG), and physical unclonab...
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Personal Name(s): | Singh, Simranjeet |
---|---|
Zahoor, Furqan / Rajendran, Gokulnath / Rana, Vikas / Patkar, Sachin / Chattopadhyay, Anupam / Merchant, Farhad | |
Contributing Institute: |
Elektronische Materialien; PGI-7 JARA Institut Green IT; PGI-10 JARA-FIT; JARA-FIT |
Imprint: |
arXiv
2023
|
ISBN: |
10.48550/ARXIV.2304.13531 |
DOI: |
10.48550/ARXIV.2304.13531 |
DOI: |
10.34734/FZJ-2024-00418 |
Document Type: |
Book Preprint |
Research Program: |
Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - Memristive Materials and Devices |
Subject (ZB): | |
Link: |
OpenAccess |
Publikationsportal JuSER |
Please use the identifier: http://dx.doi.org/10.34734/FZJ-2024-00418 in citations.
This paper proposes an architecture that integrates neural networks (NNs) and hardware security modules using a single resistive random access memory (RRAM) crossbar. The proposed architecture enables using a single crossbar to implement NN, true random number generator (TRNG), and physical unclonable function (PUF) applications while exploiting the multi-state storage characteristic of the RRAM crossbar for the vector-matrix multiplication operation required for the implementation of NN. The TRNG is implemented by utilizing the crossbar's variation in device switching thresholds to generate random bits. The PUF is implemented using the same crossbar initialized as an entropy source for the TRNG. Additionally, the weights locking concept is introduced to enhance the security of NNs by preventing unauthorized access to the NN weights. The proposed architecture provides flexibility to configure the RRAM device in multiple modes to suit different applications. It shows promise in achieving a more efficient and compact design for the hardware implementation of NNs and security primitives. |