This title appears in the Scientific Report :
2013
Please use the identifier:
http://dx.doi.org/10.1088/1748-0221/7/01/C01093 in citations.
Architectural modeling of pixel readout chips Velopix and Timepix3
Architectural modeling of pixel readout chips Velopix and Timepix3
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Personal Name(s): | Poikela, T (Corresponding author) |
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Plosila, J / Westerlund, T / Buytaert, J / Campbell, M / Llopart, X / Plackett, R / Wyllie, K / Beuzekom, M van / Gromov, V / Kluit, R / Zappon, F / Zivkovic, V / Brezina, C / Desch, K / Fang, X / Kruth, A | |
Contributing Institute: |
Zentralinstitut für Elektronik; ZEA-2 |
Published in: | Journal of Instrumentation, 7 01, S. C01093 - C01093 |
Imprint: |
London
Inst. of Physics
2012
|
Physical Description: |
? |
DOI: |
10.1088/1748-0221/7/01/C01093 |
Conference: | Topical Workshop on Electronics for Particle Physics, Vienna (Austria), 26092011 - 30092011 |
Document Type: |
Contribution to a conference proceedings Journal Article |
Research Program: |
ohne Topic |
Publikationsportal JuSER |
Description not available. |