This title appears in the Scientific Report :
2017
Please use the identifier:
http://hdl.handle.net/2128/16618 in citations.
Investigating CMOS Based Local Bias Voltage Generation for Solid-State Qubit Potential Well Creation
Investigating CMOS Based Local Bias Voltage Generation for Solid-State Qubit Potential Well Creation
Operation of a general purpose Quantum Computer requires millions of physical Qubits [1]. In order to reach this number a truly scalable electrical control approach and a corresponding rise in control and read-out capabilities will be necessary. As interfacing more and more Qubits is required, a nat...
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Personal Name(s): | Vliex, Patrick (Corresponding author) |
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Degenhardt, Carsten / Geck, Lotte / Kruth, Andre / Nielinger, Dennis / van Waasen, Stefan / Heinen, Stefan | |
Contributing Institute: |
Zentralinstitut für Elektronik; ZEA-2 |
Imprint: |
2017
|
Conference: | International Workshop on Silicon Quantum Electronics, Hillsboro (USA), 2017-08-18 - 2017-08-21 |
Document Type: |
Poster |
Research Program: |
Helmholtz Interdisciplinary Doctoral Training in Energy and Climate Research (HITEC) Impuls- und Vernetzungsfonds Controlling Collective States |
Link: |
OpenAccess OpenAccess |
Publikationsportal JuSER |
Operation of a general purpose Quantum Computer requires millions of physical Qubits [1]. In order to reach this number a truly scalable electrical control approach and a corresponding rise in control and read-out capabilities will be necessary. As interfacing more and more Qubits is required, a natural approach is to integrate as much control and read-out capability as possible close to the Qubits. Therefore, it seems reasonable to use (semiconductor based) integrated circuits (ICs) located in the same cryogenic environment as the Qubits inside a dilution refrigerator. This gives rise to highly specific requirements and challenges calling for novel circuit approaches and architectures as well as application specific designs [2]. A proof of concept IC implementation is ongoing in order to demonstrate solid-state Qubit control by an adjacent placed CMOS Chip in the temperature regime around 100 mK using a commercial 65 nm technology. One major challenge is the broadly unexplored device behavior and lack of modeling of classical bulk CMOS processes at cryogenic temperatures below the freeze-out point of dopants (<30 K) [3]. Furthermore, today’s low cooling power budget of dilution refrigerators at the lowest sub 1 K temperature stage of about 1 mW poses an additional challenge to the system solution and circuit design. First IC design approaches will be shown utilizing a 13 bit charge-redistribution DAC topology with 20 multiplexed output channels to deliver extremely stable DC output voltages (1 V dynamic range; voltage uncertainties of less than 30 µV) to form the potential well for gate defined lateral quantum dots (e.g. GaAs or SiGe based). First simulation results indicate the possibility of operating multiple GaAs based Spin Qubits (each requiring up to 10 distinct DC voltages) in parallel within the given cooling power budget. Promising early stage results of noise performance simulations are discussed and the next required steps towards a fully integrated proof-of-concept setup are introduced.[1] R. Van Meter and C. Horsman, “A Blueprint for Building a Quantum Computer,” in Communications of the ACM, vol. 56, no. 10, pp. 84-93, October 2013.[2] B. Okcan, G. Gielen and C. Van Hoof, “A third-order complementary metal-oxide-semiconductor sigma-delta modulator operating between 4.2 K and 300 K,” in Review of Scientific Instruments, vol. 83, no. 2, p. 024708, 2012.[3] Y. Creten, P. Merken, W. Sansen, R. P. Mertens and C. Van Hoof, "An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K," in IEEE Journal of Solid-State Circuits, vol. 44, no. 7, pp. 2019-2025, July 2009. |