JuLib | Articles & more

1

Journal Article

2-D Physics-Based Compact DC Modeling of Double-Gate Tunnel-FETs

Horst, Fabian
2019

IEEE transactions on electron devices, 66 (2019) 1, S. 132-138

“...2018...”

2

Journal Article

Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations

Luong, Gia Vinh
2018

IEEE journal of the Electron Devices Society, 6 (2018) S. 1033 - 1040

“...2018...”
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3

Journal Article

A Novel Gate-Normal Tunneling Field-Effect Transistor With Dual-Metal Gate

Glass, Stefan
2018

IEEE journal of the Electron Devices Society, 6 (2018) S. 1070 - 1076

“...2018...”
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4

Conference Presentation

Impact of Traps in Ferroelectric HfYOx on Negative Capacitance MOSFETs

Han, Qinghua
2018

“...2018...”

5

Lecture

Nanoelectronics towards low power applications

Zhao, Qing-Tai
2018

“...2018...”

6

Talk (non-conference)

Transistors for low power applications

Zhao, Qing-Tai
2018

“...2018...”

7

Lecture

Towards energy efficient nanoelectronics with steep slope transistors

Zhao, Qing-Tai
2018

“...2018...”

8

Journal Article

Characteristics of Recessed-Gate TFETs With Line Tunneling

Lin, Jyi-Tsong
2018

IEEE transactions on electron devices, 65 (2018) 2, S. 769 - 775

“...2018...”

9

Journal Article

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

Saeidi, Ali
2018

Nanotechnology, 29 (2018) 9, S. 095202 -

“...2018...”

10

Journal Article

Silicon tunnel FET with average subthreshold slope of 55 mV/dec at low drain currents

Narimani, K.
2018

Solid state electronics, 143 (2018) S. 62 - 68

“...2018...”

11

Contribution to a book
Contribution to a conference proceedings

Gate stack and Ni(SiGeSn) metal contacts formation on low bandgap strained (Si)Ge(Sn) semiconductors

Buca, D.
2018

“...2018...”

12

Contribution to a book
Contribution to a conference proceedings

Realization of vertical Ge nanowires for gate-all-around transistors

Liu, Mingshan
2018

“...2018...”

13

Contribution to a book
Contribution to a conference proceedings

Steep slope negative capacitance FDSOI MOSFETs with ferroelectric HfYOx

Han, Qinghua
2018

“...2018...”

14

Journal Article

Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions

Narimani, Keyvan
2018

Applied Sciences, 8 (2018) 5, S. 670 -

“...2018...”
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15

Contribution to a book
Contribution to a conference proceedings

Subthreshold Behavior of MFMIS and MFIS Transistors caused by Ferroelectric Polarization Switching

Han, Qinghua
2018

“...2018...”

16

Journal Article

SiGe based line tunneling field-effect transistors

Glass, Stefan
2018

Nanoelectronic Devices, 18 (2018) 1, S. 1

“...2018...”

17

Journal Article

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Biswas, Arnab
2017

IEEE transactions on electron devices, 64 (2017) 4, S. 1441 - 1448

“...2018...”

18

Contribution to a conference proceedings

Compact modeling of intrinsic capacitances in Double-Gate Tunnel-FETs

Farokhnejad, A.
2017

“...2018...”

19

Contribution to a book
Contribution to a conference proceedings

Analog and RF analysis of gate all around silicon nanowire MOSFETs

Liu, Linjie
2017

“...2018...”

20

Contribution to a conference proceedings

Silicon tunnel FET with average subthreshold slope of 55mV/dec at low drain currents

Narimani, K.
2017

“...2018...”

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