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2002
Institut für Halbleiterschichten und Bauelemente; ISG-1
Moers, J.
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van der Hart, A.
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2002
Institut für Halbleiterschichten und Bauelemente; ISG-1
Moers, J.
AND
van der Hart, A.
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1
Contribution to a book
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Process steps for a double gate MOSFET with vertical layout
Trellenkamp, S.
2002
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2
Conference Presentation
Process steps for a double gate MOSFET with vertical layout
Trellenkamp, S.
2002
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3
Poster
Patterning of 25 nm wide silicon webs with an aspect ratio of 13
Trellenkamp, S.
2002
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4
Conference Presentation
Herstellung von Siliziumstegen im Dekananometerbereich
Trellenkamp, S.
2002
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5
Journal Article
Top contact for vertical double-gate MOSFETs
Moers, J.
2002
Microelectronic engineering, 64 (2002) S. 465 - 471
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6
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Top contact for vertical double-gate MOSFETs
Moers, J.
2002
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Kordos, P.
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Lüth, H.
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Moers, J.
Trellenkamp, Stefan
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Goryll, M.
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Research Program
Materialien, Prozesse und Bauelemente für die Mikro- und Nanoelektronik
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Institut für Halbleiterschichten und Bauelemente; ISG-1
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2002
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